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Posted by on in IC Design

b2ap3_thumbnail_1115_TI_Glaser_F1.gifSTMicroelectronics has extended its range of high-side current-sensing portfolio with the TSC102 that simplifies design of smarter and safer systems by sensing current more accurately and giving designers extra flexibility to adjust the sensor's output before inputting to the system controller. The amplifiers provide a fully configurable integrated signal-conditioning amplifier that target automotive, industrial and computer applications.

Accurate sensing of system current is central to effective control of precision equipment performing functions such as positioning, variable-speed operation, or continuous self optimization to maximize energy efficiency. Precision current sensing is also important in a wide variety of safety mechanisms, such as auto-stop for vehicle-window lifters to prevent discomfort or injury to users.

ST's TSC102 is designed for direct connection to a small current-sensing resistor sitting at a voltage up to 30V. This direct connection allows a system to be monitored without disturbing its ground connection, which is essential in applications like automotive systems or for monitoring power supplies with multiple outputs. The device also has rugged inputs to survive applied voltages ranging from -16V to 60V. These voltages can arise in systems where many loads are switching continuously or there is a risk of a reverse battery connection, such as in vehicle electrical infrastructures.

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Reduce testing time & get feedback faster through automation. Read the Benefits of Parallel Testing, brought to you in partnership with Sauce Labs.

With the vast array of technology, language and platform choices available today, it can be very difficult to figure out where to best invest time in training your skills as a software developer.

I’m often asked advice on how to be a better programmer.

Most often the question someone asks is based on whether or not they should invest their time in a particular programming language or technology versus another.

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b2ap3_thumbnail_download-2.pngThese days, a typical corner (TT) is no longer typical for most applications. For that matter, standard PVT Corners (FF/TT/SS), generally, do not represent the exact environmental conditions in which an ASIC/SoC will be functioning. This means the voltage may not be a nominal Vdd in a typical case or Vdd±10% in an extreme case; and the temperature may not be 25C in a typical case or 125C/-40C in extreme cases. Also, in today's market, everyµW of power saved, and nS of delay avoided, makes a significant difference in a product's performance and cost. Therefore, it is important to know how a system behaves under real-time PVT conditions. One needs to characterise foundation IPs at these special (custom) corners to avoid overdesign and achieve optimal product for best power and performance. When estimating the power and timing numbers of an IP at a custom corner (e.g., @95C and Vdd+3%), it is not easy to derive values from regular SS, TT, and FF characteristics as these may not support linear extrapolations. Even small errors in calculation can be very risky. One approach is to use characterisation tools (e.g., Silicon Smart from Synopsys) that can easily characterise foundation IPs to estimate power and performance of an SoC at any custom corner with substantial accuracy using reference ".lib" files.

Ensuring accuracy

In order to generate an accurate custom corner ".lib" file, one must ensure that a reference ".lib" file, which is already provided by an IP vendor, can be generated using the setup. The better co-relation achieved ensures more accurate ".lib" generation for the custom corner. Various options and settings available in the tool enable proper alignment of setup to adhere to the processes followed by different vendors to generate highly accurate ".lib" files. The tool also provides the flexibility to choose between different simulator environments available in the market (e.g., HSpice, Spectre).

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b2ap3_thumbnail_9TpdK4aTE.gifChip design costs are expected to shoot up, but software—not hardware—is playing a much greater role in the problematic equation.

This is according to Mentor Graphics Corp. chairman and CEO Walden Rhines, who said that the shift in the equation will require a new type of EDA technology—embedded software automation (ESA)—as a means to attack the problem.

Rhines warned that IC design costs for many devices are projected to hit the dreaded $100 million level within the next three years. Not long ago (and even today), IC design costs ranged between $20-to-$50 million.

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b2ap3_thumbnail_download-1.pngWhat if the supply chain community could emulate the “Internet world” and create a universal, open logistics network that is economically, environmentally, and socially efficient and sustainable? Such a concept exists, and it’s called the Physical Internet. Today the Physical Internet is a vision for an end-to-end global logistic network, but there are plans to turn it into a reality by 2050.

Companies constantly strive to improve the efficiency of the logistics networks that move their goods worldwide. Although performance levels have increased significantly over recent decades, they are far from satisfactory. For example, too many containers and freight vehicles transport empty space or are idle because of operational delays. All too often, disruptions prevent products from reaching consumer markets, adding to the waste that pervades many logistics networks.

The Physical Internet proposes to eliminate these inefficiencies in much the same way that the Internet transformed the flow of information around the globe.

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